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cpu/NaxRiscv: Improve place and route timings robustness

This commit is contained in:
Dolu1990 2022-04-20 15:13:04 +02:00
parent ff6e7bd6ad
commit ca6378a207
1 changed files with 2 additions and 2 deletions
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4
litex/soc/cores/cpu/naxriscv/core.py
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@ -229,8 +229,8 @@ class NaxRiscv(CPU):
ndir = os.path.join(vdir, "ext", "NaxRiscv")
sdir = os.path.join(vdir, "ext", "SpinalHDL")
NaxRiscv.git_setup("NaxRiscv", ndir, "https://github.com/SpinalHDL/NaxRiscv.git" , "dev" , "d97112e1")
NaxRiscv.git_setup("SpinalHDL", sdir, "https://github.com/SpinalHDL/SpinalHDL.git", "dev" , "e1e5961d")
NaxRiscv.git_setup("NaxRiscv", ndir, "https://github.com/SpinalHDL/NaxRiscv.git" , "dev" , "8b4449f9")
NaxRiscv.git_setup("SpinalHDL", sdir, "https://github.com/SpinalHDL/SpinalHDL.git", "dev" , "4c024e93")
gen_args = []
gen_args.append(f"--netlist-name={NaxRiscv.netlist_name}")