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platforms: add -w option to bitgen_opt
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2 changed files with 2 additions and 2 deletions
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@ -103,7 +103,7 @@ _io = [
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class Platform(XilinxISEPlatform):
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bitgen_opt = "-g LCK_cycle:6 -g Binary:Yes -g SPI_buswidth:4"
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bitgen_opt = "-g LCK_cycle:6 -g Binary:Yes -w -g SPI_buswidth:4"
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ise_commands = """
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promgen -w -spi -c FF -p mcs -o {build_name}.mcs -u 0 {build_name}.bit
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"""
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@ -114,7 +114,7 @@ _io = [
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class Platform(XilinxISEPlatform):
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bitgen_opt = "-g LCK_cycle:6 -g Binary:Yes -g UnusedPin:PullUp"
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bitgen_opt = "-g LCK_cycle:6 -g Binary:Yes -w -g UnusedPin:PullUp"
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def __init__(self):
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XilinxISEPlatform.__init__(self, "xc3s1400a-ft256-4", _io,
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lambda p: CRG_DS(p, "clk64", "reset_n", rst_invert=True))
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