plaforms/nexys_video: keep up to date with litex-boards.
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@ -8,6 +8,10 @@ from litex.build.openocd import OpenOCD
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# IOs ----------------------------------------------------------------------------------------------
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_io = [
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("clk100", 0, Pins("R4"), IOStandard("LVCMOS33")),
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("cpu_reset", 0, Pins("G4"), IOStandard("LVCMOS15")),
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("user_led", 0, Pins("T14"), IOStandard("LVCMOS25")),
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("user_led", 1, Pins("T15"), IOStandard("LVCMOS25")),
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("user_led", 2, Pins("T16"), IOStandard("LVCMOS25")),
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@ -46,16 +50,34 @@ _io = [
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IOStandard("LVCMOS33")
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),
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("clk100", 0, Pins("R4"), IOStandard("LVCMOS33")),
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("cpu_reset", 0, Pins("G4"), IOStandard("LVCMOS15")),
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("serial", 0,
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Subsignal("tx", Pins("AA19")),
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Subsignal("rx", Pins("V18")),
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IOStandard("LVCMOS33"),
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),
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("usb_fifo", 0, # Can be used when FT2232H's Channel A configured to ASYNC FIFO 245 mode
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Subsignal("data", Pins("U20 P14 P15 U17 R17 P16 R18 N14")),
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Subsignal("rxf_n", Pins("N17")),
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Subsignal("txe_n", Pins("Y19")),
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Subsignal("rd_n", Pins("P19")),
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Subsignal("wr_n", Pins("R19")),
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Subsignal("siwua", Pins("P17")),
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Subsignal("oe_n", Pins("V17")),
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Misc("SLEW=FAST"),
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Drive(8),
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IOStandard("LVCMOS33"),
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),
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("sdcard", 0,
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Subsignal("rst", Pins("V20"), Misc("PULLUP True")),
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Subsignal("data", Pins("V19 T21 T20 U18"), Misc("PULLUP True")),
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Subsignal("cmd", Pins("W20"), Misc("PULLUP True")),
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Subsignal("clk", Pins("W19")),
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Misc("SLEW=FAST"),
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IOStandard("LVCMOS33"),
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),
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("ddram", 0,
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Subsignal("a", Pins(
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"M2 M5 M3 M1 L6 P1 N3 N2",
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@ -232,7 +254,7 @@ class Platform(XilinxPlatform):
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self.add_platform_command("set_property INTERNAL_VREF 0.750 [get_iobanks 35]")
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def create_programmer(self):
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return OpenOCD("openocd_xc7_ft2232.cfg", "bscan_spi_xc7a200t.bit")
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return OpenOCD("openocd_nexys_video.cfg", "bscan_spi_xc7a200t.bit")
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def do_finalize(self, fragment):
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XilinxPlatform.do_finalize(self, fragment)
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