software/liblitedram: Halve seed_array (Calibration was too long on US(+) devices) and fix write latency calibration presentation when SDRAM_DELAY_PER_DQ is not set.
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@ -410,7 +410,7 @@ static unsigned int sdram_write_read_check_test_pattern(int module, unsigned int
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return errors;
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}
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static int _seed_array[] = {42, 84, 36, 72, 24, 48};
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static int _seed_array[] = {42, 84, 36};
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static int _seed_array_length = sizeof(_seed_array) / sizeof(_seed_array[0]);
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static int run_test_pattern(int module, int dq_line) {
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@ -1028,9 +1028,15 @@ static void sdram_write_latency_calibration(void) {
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for (i=0; i<bitslip; i++) {
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sdram_leveling_action(module, dq_line, write_inc_dq_bitslip);
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}
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}
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#ifdef SDRAM_DELAY_PER_DQ
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printf("\n");
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#endif
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}
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}
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#ifndef SDRAM_DELAY_PER_DQ
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printf("\n");
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#endif
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}
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#endif // SDRAM_PHY_WRITE_LATENCY_CALIBRATION_CAPABLE
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