Merge pull request #1973 from motec-research/dts_schema_compliance

Dts schema compliance

litex/soc/integration/soc.py

@@ -944,6 +944,7 @@ class SoC(LiteXModule, SoCCoreCompat):
         self.sys_clk_freq = int(sys_clk_freq) # Do conversion to int here to allow passing float to SoC.
         self.constants    = {}
         self.csr_regions  = {}
+        self.add_constant("platform", platform.name)
 
         # Set Top-Level to LiteXContext.
         LiteXContext.top = self

litex/soc/integration/soc_core.py

@@ -247,6 +247,7 @@ class SoCCore(LiteXSoC):
         # Add Identifier.
         if ident != "":
             self.add_identifier("identifier", identifier=ident, with_build_time=ident_version)
+            self.add_constant("identifier", ident)
 
         # Add UARTBone.
         if with_uartbone:

litex/tools/litex_json2dts_linux.py

@@ -55,14 +55,20 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
     cpu_mmu  = d["constants"].get("config_cpu_mmu", None)
 
     # Header ---------------------------------------------------------------------------------------
+    platform = d["constants"]["platform"]
     dts = """
 /dts-v1/;
 
-/ {
+/ {{
+        compatible = "litex,{platform}", "litex,soc";
+        model = "{identifier}";
         #address-cells = <1>;
         #size-cells    = <1>;
 
-"""
+""".format(
+        platform=platform,
+        identifier=d["constants"].get("identifier", platform),
+    )
 
     # Boot Arguments -------------------------------------------------------------------------------
 
@@ -161,6 +167,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
         tlb_desc = ""
         if "config_cpu_dtlb_size" in d["constants"]:
             tlb_desc += """
+                tlb-split;
                 d-tlb-size = <{d_tlb_size}>;
                 d-tlb-sets = <{d_tlb_ways}>;
 """.format(
@@ -181,7 +188,6 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
                 next-level-cache = <&memory>;
                 riscv,pmpgranularity = <4>;
                 riscv,pmpregions = <8>;
-                tlb-split;
 """
         else:
             extra_attr = ""