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build/generic_platform: Minor cosmetic cleanups.

This commit is contained in:
Florent Kermarrec 2021-03-10 19:19:41 +01:00
parent 9d08c65e8a
commit da1277021a
1 changed files with 28 additions and 24 deletions
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52
litex/build/generic_platform.py
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@ -18,11 +18,14 @@ from litex.gen.fhdl import verilog
from litex.build.io import CRG from litex.build.io import CRG
from litex.build import tools from litex.build import tools
# --------------------------------------------------------------------------------------------------
class ConstraintError(Exception): class ConstraintError(Exception):
pass pass
# IOS ----------------------------------------------------------------------------------------------
class Pins: class Pins:
def __init__(self, *identifiers): def __init__(self, *identifiers):
self.identifiers = [] self.identifiers = []
@ -33,8 +36,7 @@ class Pins:
self.identifiers += i.split() self.identifiers += i.split()
def __repr__(self): def __repr__(self):
return "{}('{}')".format(self.__class__.__name__, return "{}('{}')".format(self.__class__.__name__, " ".join(self.identifiers))
" ".join(self.identifiers))
class IOStandard: class IOStandard:
@ -69,15 +71,15 @@ class Inverted:
class Subsignal: class Subsignal:
def __init__(self, name, *constraints): def __init__(self, name, *constraints):
self.name = name self.name = name
self.constraints = list(constraints) self.constraints = list(constraints)
def __repr__(self): def __repr__(self):
return "{}('{}', {})".format( return "{}('{}', {})".format(self.__class__.__name__,
self.__class__.__name__,
self.name, self.name,
", ".join([repr(constr) for constr in self.constraints])) ", ".join([repr(constr) for constr in self.constraints]))
# Platform -----------------------------------------------------------------------------------------
class PlatformInfo: class PlatformInfo:
def __init__(self, info): def __init__(self, info):
@ -111,7 +113,7 @@ def _resource_type(resource):
i = [] i = []
assert(isinstance(t, list)) assert(isinstance(t, list))
n_bits = None n_bits = None
inverted = False inverted = False
for c in element.constraints: for c in element.constraints:
if isinstance(c, Pins): if isinstance(c, Pins):
@ -125,12 +127,13 @@ def _resource_type(resource):
return t, i return t, i
# Connector Manager --------------------------------------------------------------------------------
class ConnectorManager: class ConnectorManager:
def __init__(self, connectors): def __init__(self, connectors):
self.connector_table = dict() self.connector_table = dict()
for connector in connectors: for connector in connectors:
cit = iter(connector) cit = iter(connector)
conn_name = next(cit) conn_name = next(cit)
if isinstance(connector[1], str): if isinstance(connector[1], str):
pin_list = [] pin_list = []
@ -164,7 +167,7 @@ class ConnectorManager:
def _separate_pins(constraints): def _separate_pins(constraints):
pins = None pins = None
others = [] others = []
for c in constraints: for c in constraints:
if isinstance(c, Pins): if isinstance(c, Pins):
@ -175,11 +178,12 @@ def _separate_pins(constraints):
return pins, others return pins, others
# Constraint Manager -------------------------------------------------------------------------------
class ConstraintManager: class ConstraintManager:
def __init__(self, io, connectors): def __init__(self, io, connectors):
self.available = list(io) self.available = list(io)
self.matched = [] self.matched = []
self.platform_commands = [] self.platform_commands = []
self.connector_manager = ConnectorManager(connectors) self.connector_manager = ConnectorManager(connectors)
@ -258,9 +262,9 @@ class ConstraintManager:
def get_sig_constraints(self): def get_sig_constraints(self):
r = [] r = []
for resource, obj in self.matched: for resource, obj in self.matched:
name = resource[0] name = resource[0]
number = resource[1] number = resource[1]
has_subsignals = False has_subsignals = False
top_constraints = [] top_constraints = []
for element in resource[2:]: for element in resource[2:]:
if isinstance(element, Subsignal): if isinstance(element, Subsignal):
@ -287,10 +291,11 @@ class ConstraintManager:
def get_platform_commands(self): def get_platform_commands(self):
return self.platform_commands return self.platform_commands
# Generic Platform ---------------------------------------------------------------------------------
class GenericPlatform: class GenericPlatform:
def __init__(self, device, io, connectors=[], name=None): def __init__(self, device, io, connectors=[], name=None):
self.device = device self.device = device
self.constraint_manager = ConstraintManager(io, connectors) self.constraint_manager = ConstraintManager(io, connectors)
if name is None: if name is None:
# Get name from Platform file. # Get name from Platform file.
@ -298,12 +303,12 @@ class GenericPlatform:
if name == "__main__": if name == "__main__":
# If no Platform file, use script filename, # If no Platform file, use script filename,
name = os.path.splitext(os.path.basename(sys.argv[0]))[0] name = os.path.splitext(os.path.basename(sys.argv[0]))[0]
self.name = name self.name = name
self.sources = [] self.sources = []
self.verilog_include_paths = [] self.verilog_include_paths = []
self.output_dir = None self.output_dir = None
self.finalized = False self.finalized = False
self.use_default_clk = False self.use_default_clk = False
def request(self, *args, **kwargs): def request(self, *args, **kwargs):
return self.constraint_manager.request(*args, **kwargs) return self.constraint_manager.request(*args, **kwargs)
@ -335,7 +340,7 @@ class GenericPlatform:
def finalize(self, fragment, *args, **kwargs): def finalize(self, fragment, *args, **kwargs):
if self.finalized: if self.finalized:
raise ConstraintError("Already finalized") raise ConstraintError("Already finalized")
# if none exists, create a default clock domain and drive it # If none exists, create a default clock domain and drive it.
if not fragment.clock_domains: if not fragment.clock_domains:
if not hasattr(self, "default_clk_name"): if not hasattr(self, "default_clk_name"):
raise NotImplementedError( raise NotImplementedError(
@ -348,8 +353,7 @@ class GenericPlatform:
self.finalized = True self.finalized = True
def do_finalize(self, fragment, *args, **kwargs): def do_finalize(self, fragment, *args, **kwargs):
"""overload this and e.g. add_platform_command()'s after the modules # Overload this and e.g. add_platform_command()'s after the modules had their say.
had their say"""
if self.use_default_clk and hasattr(self, "default_clk_period"): if self.use_default_clk and hasattr(self, "default_clk_period"):
try: try:
self.add_period_constraint( self.add_period_constraint(
@ -393,11 +397,11 @@ class GenericPlatform:
self.verilog_include_paths.append(os.path.abspath(path)) self.verilog_include_paths.append(os.path.abspath(path))
def resolve_signals(self, vns): def resolve_signals(self, vns):
# resolve signal names in constraints # Resolve signal names in constraints.
sc = self.constraint_manager.get_sig_constraints() sc = self.constraint_manager.get_sig_constraints()
named_sc = [(vns.get_name(sig), pins, others, resource) named_sc = [(vns.get_name(sig), pins, others, resource)
for sig, pins, others, resource in sc] for sig, pins, others, resource in sc]
# resolve signal names in platform commands # Resolve signal names in platform commands.
pc = self.constraint_manager.get_platform_commands() pc = self.constraint_manager.get_platform_commands()
named_pc = [] named_pc = []
for template, args in pc: for template, args in pc: