tools/litex_json2renode: Update PLIC interrupt configuration

This commit is contained in:
Piotr Wojnarowski 2022-06-13 13:50:22 +02:00
parent 212db12b1d
commit dae22a0d9d
1 changed files with 3 additions and 3 deletions

View File

@ -433,12 +433,12 @@ clint: IRQControllers.CoreLevelInterruptor @ {}
def generate_plic(plic): def generate_plic(plic):
# TODO: this is configuration for VexRiscv - add support for other CPU types # TODO: this is configuration for linux-on-litex-vexriscv - add support for other CPU types
result = """ result = """
plic: IRQControllers.PlatformLevelInterruptController @ {} plic: IRQControllers.PlatformLevelInterruptController @ {}
[0-3] -> cpu@[8-11] [0, 1] -> cpu@[11, 9]
numberOfSources: 31 numberOfSources: 31
numberOfTargets: 2 numberOfContexts: 2
prioritiesEnabled: false prioritiesEnabled: false
""".format(generate_sysbus_registration(plic, """.format(generate_sysbus_registration(plic,
skip_braces=True, skip_braces=True,