move valentyusb install to litex_setup.py
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@ -1350,9 +1350,6 @@ class LiteXSoC(SoC):
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# USB ACM (with ValentyUSB core).
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# USB ACM (with ValentyUSB core).
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elif uart_name in ["usb_acm"]:
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elif uart_name in ["usb_acm"]:
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# FIXME: do proper install of ValentyUSB.
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os.system("git clone https://github.com/litex-hub/valentyusb -b hw_cdc_eptri")
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sys.path.append("valentyusb")
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import valentyusb.usbcore.io as usbio
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import valentyusb.usbcore.io as usbio
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import valentyusb.usbcore.cpu.cdc_eptri as cdc_eptri
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import valentyusb.usbcore.cpu.cdc_eptri as cdc_eptri
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usb_pads = self.platform.request("usb")
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usb_pads = self.platform.request("usb")
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@ -76,6 +76,7 @@ git_repos = {
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# ------------------
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# ------------------
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"pythondata-software-picolibc": GitRepo(url="https://github.com/litex-hub/", clone="recursive"),
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"pythondata-software-picolibc": GitRepo(url="https://github.com/litex-hub/", clone="recursive"),
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"pythondata-software-compiler_rt": GitRepo(url="https://github.com/litex-hub/"),
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"pythondata-software-compiler_rt": GitRepo(url="https://github.com/litex-hub/"),
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"valentyusb": GitRepo(url="https://github.com/litex-hub/"),
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"litex": GitRepo(url="https://github.com/enjoy-digital/", tag=True),
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"litex": GitRepo(url="https://github.com/enjoy-digital/", tag=True),
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# LiteX Cores Ecosystem.
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# LiteX Cores Ecosystem.
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