Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

integration/soc: warn about overrides only on differences

This commit is contained in:
Ilia Sergachev 2022-01-15 17:13:48 +01:00
parent f8863bb986
commit db9d40a5a0
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
litex/soc/integration/soc.py
View File

@ -926,7 +926,7 @@ class SoC(Module):
else: else:
# Override User's mapping with CPU constrainted mapping (and warn User). # Override User's mapping with CPU constrainted mapping (and warn User).
for n, origin in self.cpu.mem_map.items(): for n, origin in self.cpu.mem_map.items():
if n in self.mem_map.keys(): if n in self.mem_map.keys() and self.mem_map[n] != self.cpu.mem_map[n]:
self.logger.info("CPU {} {} mapping from {} to {}.".format( self.logger.info("CPU {} {} mapping from {} to {}.".format(
colorer("overriding", color="cyan"), colorer("overriding", color="cyan"),
colorer(n), colorer(n),