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soc/add_cpu: Add **kwargs support.

This commit is contained in:
Florent Kermarrec 2021-05-17 09:53:40 +02:00
parent 298f65e78e
commit dd72b1acfe
1 changed files with 2 additions and 2 deletions
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4
litex/soc/integration/soc.py
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@ -861,7 +861,7 @@ class SoC(Module):
self.add_config("CSR_DATA_WIDTH", self.csr.data_width) self.add_config("CSR_DATA_WIDTH", self.csr.data_width)
self.add_config("CSR_ALIGNMENT", self.csr.alignment) self.add_config("CSR_ALIGNMENT", self.csr.alignment)
def add_cpu(self, name="vexriscv", variant="standard", cls=None, reset_address=None): def add_cpu(self, name="vexriscv", variant="standard", cls=None, reset_address=None, **kwargs):
# Check that CPU is supported. # Check that CPU is supported.
if name not in cpu.CPUS.keys(): if name not in cpu.CPUS.keys():
self.logger.error("{} CPU {}, supporteds: {}.".format( self.logger.error("{} CPU {}, supporteds: {}.".format(
@ -884,7 +884,7 @@ class SoC(Module):
colorer(", ".join(cpu_cls.variants)))) colorer(", ".join(cpu_cls.variants))))
raise raise
self.check_if_exists("cpu") self.check_if_exists("cpu")
self.submodules.cpu = cpu_cls(self.platform, variant) self.submodules.cpu = cpu_cls(self.platform, variant, **kwargs)
# Update SoC with CPU constraints. # Update SoC with CPU constraints.
for n, (origin, size) in enumerate(self.cpu.io_regions.items()): for n, (origin, size) in enumerate(self.cpu.io_regions.items()):