interconnect/packet/Packetizer/Depacketizer: Avoid generating unaligned logic when aligned.
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@ -170,6 +170,7 @@ class Packetizer(Module):
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bytes_per_clk = data_width//8
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header_words = (header.length*8)//data_width
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header_leftover = header.length%bytes_per_clk
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aligned = header_leftover == 0
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# Signals.
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sr = Signal(header.length*8, reset_less=True)
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@ -208,11 +209,7 @@ class Packetizer(Module):
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sr_load.eq(1),
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NextValue(fsm_from_idle, 1),
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If(header_words == 1,
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If(header_leftover != 0,
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NextState("UNALIGNED-DATA-COPY")
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).Else(
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NextState("ALIGNED-DATA-COPY")
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)
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NextState("ALIGNED-DATA-COPY" if aligned else "UNALIGNED-DATA-COPY")
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).Else(
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NextState("HEADER-SEND")
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)
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@ -227,12 +224,8 @@ class Packetizer(Module):
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sr_shift.eq(1),
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If(count == (header_words - 1),
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sr_shift.eq(0),
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If(header_leftover,
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NextState("UNALIGNED-DATA-COPY"),
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NextValue(count, count + 1)
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).Else(
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NextState("ALIGNED-DATA-COPY")
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)
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NextState("ALIGNED-DATA-COPY" if aligned else "UNALIGNED-DATA-COPY"),
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NextValue(count, count + 1)
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).Else(
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NextValue(count, count + 1),
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)
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@ -251,26 +244,27 @@ class Packetizer(Module):
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)
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)
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)
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header_offset_multiplier = 1 if header_words == 1 else 2
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self.sync += If(source.ready, sink_d.eq(sink))
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fsm.act("UNALIGNED-DATA-COPY",
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source.valid.eq(sink.valid | sink_d.last),
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source.last.eq(sink_d.last),
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source_last_be.eq(last_be_d),
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If(fsm_from_idle,
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source.data[:max(header_leftover*8, 1)].eq(sr[min(header_offset_multiplier*data_width, len(sr)-1):])
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).Else(
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source.data[:max(header_leftover*8, 1)].eq(sink_d.data[min((bytes_per_clk-header_leftover)*8, data_width-1):])
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),
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source.data[header_leftover*8:].eq(sink.data),
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If(source.valid & source.ready,
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sink.ready.eq(~source.last),
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NextValue(fsm_from_idle, 0),
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If(source.last,
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NextState("IDLE")
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if not aligned:
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header_offset_multiplier = 1 if header_words == 1 else 2
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self.sync += If(source.ready, sink_d.eq(sink))
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fsm.act("UNALIGNED-DATA-COPY",
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source.valid.eq(sink.valid | sink_d.last),
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source.last.eq(sink_d.last),
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source_last_be.eq(last_be_d),
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If(fsm_from_idle,
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source.data[:max(header_leftover*8, 1)].eq(sr[min(header_offset_multiplier*data_width, len(sr)-1):])
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).Else(
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source.data[:max(header_leftover*8, 1)].eq(sink_d.data[min((bytes_per_clk-header_leftover)*8, data_width-1):])
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),
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source.data[header_leftover*8:].eq(sink.data),
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If(source.valid & source.ready,
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sink.ready.eq(~source.last),
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NextValue(fsm_from_idle, 0),
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If(source.last,
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NextState("IDLE")
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)
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)
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)
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)
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# Error.
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if hasattr(sink, "error") and hasattr(source, "error"):
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@ -291,6 +285,7 @@ class Depacketizer(Module):
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bytes_per_clk = data_width//8
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header_words = (header.length*8)//data_width
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header_leftover = header.length%bytes_per_clk
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aligned = header_leftover == 0
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# Signals.
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sr = Signal(header.length*8, reset_less=True)
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@ -320,11 +315,7 @@ class Depacketizer(Module):
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sr_shift.eq(1),
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NextValue(fsm_from_idle, 1),
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If(header_words == 1,
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If(header_leftover,
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NextState("UNALIGNED-DATA-COPY")
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).Else(
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NextState("ALIGNED-DATA-COPY")
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),
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NextState("ALIGNED-DATA-COPY" if aligned else "UNALIGNED-DATA-COPY"),
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).Else(
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NextState("HEADER-RECEIVE")
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)
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@ -336,33 +327,8 @@ class Depacketizer(Module):
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NextValue(count, count + 1),
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sr_shift.eq(1),
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If(count == (header_words - 1),
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If(header_leftover,
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NextValue(count, count + 1),
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NextState("UNALIGNED-DATA-COPY")
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).Else(
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NextState("ALIGNED-DATA-COPY")
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)
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)
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)
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)
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self.sync += If(sink.valid & sink.ready, sink_d.eq(sink))
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fsm.act("UNALIGNED-DATA-COPY",
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source.valid.eq(sink.valid | sink_d.last),
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source.last.eq(sink.last | sink_d.last),
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sink.ready.eq(source.ready),
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source.data.eq(sink_d.data[header_leftover*8:]),
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source.data[min((bytes_per_clk-header_leftover)*8, data_width-1):].eq(sink.data),
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If(fsm_from_idle,
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source.valid.eq(sink_d.last),
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sink.ready.eq(1),
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If(sink.valid,
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NextValue(fsm_from_idle, 0),
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sr_shift_leftover.eq(1),
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)
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),
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If(source.valid & source.ready,
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If(source.last,
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NextState("IDLE")
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NextState("ALIGNED-DATA-COPY" if aligned else "UNALIGNED-DATA-COPY"),
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NextValue(count, count + 1),
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)
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)
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)
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@ -378,6 +344,29 @@ class Depacketizer(Module):
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)
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)
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if not aligned:
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self.sync += If(sink.valid & sink.ready, sink_d.eq(sink))
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fsm.act("UNALIGNED-DATA-COPY",
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source.valid.eq(sink.valid | sink_d.last),
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source.last.eq(sink.last | sink_d.last),
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sink.ready.eq(source.ready),
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source.data.eq(sink_d.data[header_leftover*8:]),
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source.data[min((bytes_per_clk-header_leftover)*8, data_width-1):].eq(sink.data),
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If(fsm_from_idle,
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source.valid.eq(sink_d.last),
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sink.ready.eq(1),
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If(sink.valid,
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NextValue(fsm_from_idle, 0),
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sr_shift_leftover.eq(1),
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)
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),
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If(source.valid & source.ready,
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If(source.last,
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NextState("IDLE")
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)
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)
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)
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# Error.
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if hasattr(sink, "error") and hasattr(source, "error"):
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self.comb += source.error.eq(sink.error)
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