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CHANGES.md: Update.

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Florent Kermarrec 2024-02-01 08:34:17 +01:00
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@ -6,6 +6,7 @@
- interconnect/ahb/AHB2Wishbone : Fixed size check that was too restrictive.
- liteeth/phy/gw5rgmii : Fixed Clk assignments.
- build/efinix/programmer : Updated for compatibility with latest Efinity versions.
- litespi/software: : Fixed SPI Flash Clk Divider computation when with L2 Cache.
[> Added
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@ -17,6 +18,8 @@
- cpu/naxriscv : Updated arch definition and added rvc configuration parameters.
- cpu/vexriscv_smp : Added csr/clint/plic base address configuration parameters.
- liteeth/phy : Added 7-Series/Ultrascale(+) 2500BaseX PHYs.
- litespi/sdrphy: : Allowed flash parameter to be None.
- litespi/integration : Improved integration and simplifications.
[> Changed
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