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cores/cpu: add riscv-none-embed toolchain support to riscv32 cpus

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This commit is contained in:
Florent Kermarrec 2019-08-09 12:33:10 +02:00
parent 6d94c07d70
commit e670cb9176
3 changed files with 3 additions and 3 deletions
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2
litex/soc/cores/cpu/minerva/core.py
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@ -22,7 +22,7 @@ class Minerva(Module):
@property @property
def gcc_triple(self): def gcc_triple(self):
return ("riscv64-unknown-elf", "riscv32-unknown-elf") return ("riscv64-unknown-elf", "riscv32-unknown-elf", "riscv-none-embed")
@property @property
def gcc_flags(self): def gcc_flags(self):

2
litex/soc/cores/cpu/picorv32/core.py
View file

@ -40,7 +40,7 @@ class PicoRV32(Module):
@property @property
def gcc_triple(self): def gcc_triple(self):
return ("riscv64-unknown-elf", "riscv32-unknown-elf") return ("riscv64-unknown-elf", "riscv32-unknown-elf", "riscv-none-embed")
@property @property
def gcc_flags(self): def gcc_flags(self):

2
litex/soc/cores/cpu/vexriscv/core.py
View file

@ -84,7 +84,7 @@ class VexRiscv(Module, AutoCSR):
@property @property
def gcc_triple(self): def gcc_triple(self):
return ("riscv64-unknown-elf", "riscv32-unknown-elf") return ("riscv64-unknown-elf", "riscv32-unknown-elf", "riscv-none-embed")
@property @property
def gcc_flags(self): def gcc_flags(self):