boards/targets: SDRAM modules are now litedram.modules
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@ -8,7 +8,7 @@ from litex.boards.platforms import de0nano
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from litex.soc.integration.soc_sdram import *
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from litex.soc.integration.builder import *
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from litedram.settings import IS42S16160
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from litedram.modules import IS42S16160
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from litedram.phy import GENSDRPHY
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@ -11,7 +11,7 @@ from litex.soc.integration.soc_core import mem_decoder
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from litex.soc.integration.soc_sdram import *
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from litex.soc.integration.builder import *
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from litedram.settings import MT8JTF12864
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from litedram.modules import MT8JTF12864
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from litedram.phy import k7ddrphy
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from liteeth.phy import LiteEthPHY
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@ -10,7 +10,7 @@ from litex.boards.platforms import minispartan6
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from litex.soc.integration.soc_sdram import *
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from litex.soc.integration.builder import *
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from litedram.settings import AS4C16M16
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from litedram.modules import AS4C16M16
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from litedram.phy import GENSDRPHY
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@ -12,7 +12,7 @@ from litex.soc.integration.builder import *
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from litex.soc.cores import uart
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from litex.soc.integration.soc_core import mem_decoder
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from litedram.settings import PhySettings, IS42S16160
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from litedram.modules import PhySettings, IS42S16160
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from litedram.model import SDRAMPHYModel
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from liteeth.phy.model import LiteEthPHYModel
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