soc_core/common: move old mem_decoder to soc_core, simplify get_version

litex/soc/integration/common.py

@@ -12,21 +12,9 @@ from migen import *
 
 # Helpers ----------------------------------------------------------------------------------------
 
-def mem_decoder(address, size=0x10000000):
-    address &= ~0x80000000
-    size = 2**log2_int(size, False)
-    assert (address & (size - 1)) == 0
-    address >>= 2 # bytes to words aligned
-    size    >>= 2 # bytes to words aligned
-    return lambda a: (a[log2_int(size):-1] == (address >> log2_int(size)))
-
 def get_version(with_time=True):
-    if with_time:
+    fmt = "%Y-%m-%d %H:%M:%S" if with_time else "%Y-%m-%d"
-        return datetime.datetime.fromtimestamp(
+    return datetime.datetime.fromtimestamp(time.time()).strftime("%Y-%m-%d %H:%M:%S")
-                time.time()).strftime("%Y-%m-%d %H:%M:%S")
-    else:
-        return datetime.datetime.fromtimestamp(
-                time.time()).strftime("%Y-%m-%d")
 
 def get_mem_data(filename_or_regions, endianness="big", mem_size=None):
     # create memory regions

litex/soc/integration/soc_core.py

@@ -37,6 +37,16 @@ __all__ = [
     "soc_mini_argdict",
 ]
 
+# Helpers ------------------------------------------------------------------------------------------
+
+def mem_decoder(address, size=0x10000000):
+    size = 2**log2_int(size, False)
+    assert (address & (size - 1)) == 0
+    address >>= 2 # bytes to words aligned
+    size    >>= 2 # bytes to words aligned
+    return lambda a: (a[log2_int(size):] == (address >> log2_int(size)))
+
+
 # SoCCore ------------------------------------------------------------------------------------------
 
 class SoCCore(LiteXSoC):