adapt to migen changes

examples/de0_nano/top.py

@@ -33,6 +33,7 @@
 #	I M P O R T 
 #==============================================================================
 from migen.fhdl.structure import *
+from migen.fhdl.specials import Memory
 from migen.fhdl import verilog, autofragment
 from migen.bus import csr
 from migen.bus.transactions import *

examples/de1/top.py

@@ -33,6 +33,7 @@
 #	I M P O R T 
 #==============================================================================
 from migen.fhdl.structure import *
+from migen.fhdl.specials import Memory
 from migen.fhdl import verilog, autofragment
 from migen.bus import csr
 from migen.bus.transactions import *

miscope/recorder.py

@@ -1,9 +1,10 @@
 from migen.fhdl.structure import *
+from migen.fhdl.specials import Memory
 from migen.bus import csr
 from migen.bank import description, csrgen
 from migen.bank.description import *
-from migen.corelogic.misc import optree
+from migen.genlib.misc import optree
-from migen.corelogic.fsm import *
+from migen.genlib.fsm import *
 
 class Storage:
 	# 
@@ -88,7 +89,7 @@ class Storage:
 		]
 		comb +=[self.done.eq((self._push_ptr == self._push_ptr_stop) & active_ongoing)]
 		
-		return Fragment(comb, sync, memories=[self._mem])
+		return Fragment(comb, sync, specials={self._mem})
 
 class Sequencer:
 	# 

miscope/tools/vcd.py

@@ -1,8 +1,7 @@
 import sys
 import datetime
 
-sys.path.append("../../")
+from miscope.tools.conv import *
-from migScope.tools.conv import *
 
 def get_bits(values, width, low, high =None):
 	r = []

miscope/trigger.py

@@ -1,8 +1,9 @@
 from migen.fhdl.structure import *
+from migen.fhdl.specials import Memory
 from migen.bus import csr
 from migen.bank import description, csrgen
 from migen.bank.description import *
-from migen.corelogic.misc import optree
+from migen.genlib.misc import optree
 
 
 class RegParams:
@@ -233,7 +234,7 @@ class Sum:
 				self.o.eq(self._o)
 		]
 		comb += self.get_registers()
-		return Fragment(comb, memories=[self._mem])
+		return Fragment(comb, specials={self._mem})
 	
 	#
 	#Driver