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test: we can now test regs with Etherbone

This commit is contained in:
Florent Kermarrec 2015-02-16 23:39:12 +01:00
parent 1a3183c15d
commit eeaf03669a
2 changed files with 12 additions and 4 deletions
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13
test/config.py
View File

@ -1,9 +1,14 @@
from litescope.host.driver import LiteScopeUART2WBDriver use_uart = 0
use_eth = 1
csr_csv_file = "./csr.csv" csr_csv_file = "./csr.csv"
busword = 32 busword = 32
debug_wb = False debug_wb = False
com = 2 if use_uart:
baud = 921600 from litescope.host.driver import LiteScopeUART2WBDriver
wb = LiteScopeUART2WBDriver(com, baud, csr_csv_file, busword, debug_wb) wb = LiteScopeUART2WBDriver(2, 921600, csr_csv_file, busword, debug_wb)
if use_eth:
from litescope.host.driver import LiteScopeEtherboneDriver
wb = LiteScopeEtherboneDriver("192.168.1.40", 20000, csr_csv_file, debug_wb)

3
test/test_regs.py
View File

@ -7,5 +7,8 @@ regs.phy_crg_reset.write(1)
print("sysid : 0x%04x" %regs.identifier_sysid.read()) print("sysid : 0x%04x" %regs.identifier_sysid.read())
print("revision : 0x%04x" %regs.identifier_revision.read()) print("revision : 0x%04x" %regs.identifier_revision.read())
print("frequency : %d MHz" %(regs.identifier_frequency.read()/1000000)) print("frequency : %d MHz" %(regs.identifier_frequency.read()/1000000))
SRAM_BASE = 0x02000000
wb.write(SRAM_BASE, [i for i in range(64)])
print(wb.read(SRAM_BASE, 64))
### ###
wb.close() wb.close()