Merge pull request #1995 from VOGL-electronic/soc_spi_master_int

soc: add_spi_master: make spi_clk_freq an int
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enjoy-digital 2024-06-19 19:34:31 +02:00 committed by GitHub
commit f40f63ae29
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@ -1973,6 +1973,8 @@ class LiteXSoC(SoC):
self.check_if_exists(f"{name}") self.check_if_exists(f"{name}")
spi_clk_freq = int(spi_clk_freq)
if pads is None: if pads is None:
pads = self.platform.request(name) pads = self.platform.request(name)