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Wishbone: omit fixed LSBs

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This commit is contained in:
Sebastien Bourdeauducq 2012-01-13 17:28:58 +01:00
parent 570ea8ccf8
commit f8d5c27ef8
2 changed files with 7 additions and 5 deletions
milkymist
lm32
__init__.py
norflash
__init__.py

8
milkymist/lm32/__init__.py
View file

@ -8,7 +8,7 @@ class Inst:
self.interrupt = Signal(BV(32)) self.interrupt = Signal(BV(32))
self.ext_break = Signal() self.ext_break = Signal()
self._inst = Instance("lm32_top", self._inst = Instance("lm32_top",
[("I_ADR_O", i.adr_o), [("I_ADR_O", BV(32)),
("I_DAT_O", i.dat_o), ("I_DAT_O", i.dat_o),
("I_SEL_O", i.sel_o), ("I_SEL_O", i.sel_o),
("I_CYC_O", i.cyc_o), ("I_CYC_O", i.cyc_o),
@ -17,7 +17,7 @@ class Inst:
("I_CTI_O", i.cti_o), ("I_CTI_O", i.cti_o),
("I_LOCK_O", BV(1)), ("I_LOCK_O", BV(1)),
("I_BTE_O", i.bte_o), ("I_BTE_O", i.bte_o),
("D_ADR_O", d.adr_o), ("D_ADR_O", BV(32)),
("D_DAT_O", d.dat_o), ("D_DAT_O", d.dat_o),
("D_SEL_O", d.sel_o), ("D_SEL_O", d.sel_o),
("D_CYC_O", d.cyc_o), ("D_CYC_O", d.cyc_o),
@ -44,6 +44,8 @@ class Inst:
def get_fragment(self): def get_fragment(self):
comb = [ comb = [
self._inst.ins["I_RTY_I"].eq(0), self._inst.ins["I_RTY_I"].eq(0),
self._inst.ins["D_RTY_I"].eq(0) self._inst.ins["D_RTY_I"].eq(0),
self.ibus.adr_o.eq(self._inst.outs["I_ADR_O"][2:]),
self.dbus.adr_o.eq(self._inst.outs["D_ADR_O"][2:])
] ]
return Fragment(comb=comb, instances=[self._inst]) return Fragment(comb=comb, instances=[self._inst])

4
milkymist/norflash/__init__.py
View file

@ -11,10 +11,10 @@ class Inst:
self.we_n = Signal() self.we_n = Signal()
self.ce_n = Signal() self.ce_n = Signal()
self.timeline = timeline.Inst(self.bus.cyc_i & self.bus.stb_i, self.timeline = timeline.Inst(self.bus.cyc_i & self.bus.stb_i,
[(0, [self.adr.eq(Cat(0, self.bus.adr_i[2:adr_width]))]), [(0, [self.adr.eq(Cat(0, self.bus.adr_i[:adr_width-2]))]),
(rd_timing, [ (rd_timing, [
self.bus.dat_o[16:].eq(self.d), self.bus.dat_o[16:].eq(self.d),
self.adr.eq(Cat(1, self.bus.adr_i[2:adr_width]))]), self.adr.eq(Cat(1, self.bus.adr_i[:adr_width-2]))]),
(2*rd_timing, [ (2*rd_timing, [
self.bus.dat_o[:16].eq(self.d), self.bus.dat_o[:16].eq(self.d),
self.bus.ack_o.eq(1)]), self.bus.ack_o.eq(1)]),