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software: always provide flush_l2_cache implementation (even if empty) to avoid #ifdefs CONFIG_L2_SIZE.

This commit is contained in:
Florent Kermarrec 2020-12-07 13:45:05 +01:00
parent 3ce74f6e29
commit fb05fbc5cc
5 changed files with 7 additions and 23 deletions
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2
litex/soc/software/bios/boot.c
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@ -60,9 +60,7 @@ static void __attribute__((noreturn)) boot(unsigned long r1, unsigned long r2, u
#endif #endif
flush_cpu_icache(); flush_cpu_icache();
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif
#if defined(CONFIG_CPU_TYPE_MOR1KX) && defined(CONFIG_CPU_VARIANT_LINUX) #if defined(CONFIG_CPU_TYPE_MOR1KX) && defined(CONFIG_CPU_VARIANT_LINUX)
/* Mainline Linux expects to have exception vector base address set to the /* Mainline Linux expects to have exception vector base address set to the

16
litex/soc/software/libbase/memtest.c
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@ -7,9 +7,9 @@
#include <generated/soc.h> #include <generated/soc.h>
#include <generated/csr.h> #include <generated/csr.h>
// #define MEMTEST_BUS_DEBUG //#define MEMTEST_BUS_DEBUG
// #define MEMTEST_DATA_DEBUG //#define MEMTEST_DATA_DEBUG
// #define MEMTEST_ADDR_DEBUG //#define MEMTEST_ADDR_DEBUG
#define KIB 1024 #define KIB 1024
#define MIB (KIB*1024) #define MIB (KIB*1024)
@ -54,9 +54,7 @@ int memtest_bus(unsigned int *addr, unsigned long size)
/* Flush caches */ /* Flush caches */
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif
/* Read/Verify One/Zero pattern */ /* Read/Verify One/Zero pattern */
for(i=0; i<size/4; i++) { for(i=0; i<size/4; i++) {
@ -76,9 +74,7 @@ int memtest_bus(unsigned int *addr, unsigned long size)
/* Flush caches */ /* Flush caches */
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif
/* Read/Verify One/Zero pattern */ /* Read/Verify One/Zero pattern */
for(i = 0; i < size/4; i++) { for(i = 0; i < size/4; i++) {
@ -112,9 +108,7 @@ int memtest_addr(unsigned int *addr, unsigned long size, int random)
/* Flush caches */ /* Flush caches */
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif
/* Read/Verify datas */ /* Read/Verify datas */
seed_16 = 1; seed_16 = 1;
@ -177,9 +171,7 @@ int memtest_data(unsigned int *addr, unsigned long size, int random)
/* Flush caches */ /* Flush caches */
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif
/* Read/Verify datas */ /* Read/Verify datas */
seed_32 = 1; seed_32 = 1;
@ -240,9 +232,7 @@ void memspeed(unsigned int *addr, unsigned long size, bool read_only)
/* flush caches */ /* flush caches */
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif
/* Measure Read speed */ /* Measure Read speed */
timer0_en_write(1); timer0_en_write(1);

4
litex/soc/software/libbase/system.c
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@ -5,15 +5,15 @@
#include <generated/mem.h> #include <generated/mem.h>
#include <generated/csr.h> #include <generated/csr.h>
#ifdef CONFIG_L2_SIZE
void flush_l2_cache(void) void flush_l2_cache(void)
{ {
#ifdef CONFIG_L2_SIZE
unsigned int i; unsigned int i;
for(i=0;i<2*CONFIG_L2_SIZE/4;i++) { for(i=0;i<2*CONFIG_L2_SIZE/4;i++) {
((volatile unsigned int *) MAIN_RAM_BASE)[i]; ((volatile unsigned int *) MAIN_RAM_BASE)[i];
} }
}
#endif #endif
}
void busy_wait(unsigned int ms) void busy_wait(unsigned int ms)
{ {

4
litex/soc/software/liblitesata/sata.c
View File

@ -62,12 +62,10 @@ void sata_read(uint32_t sector, uint32_t count, uint8_t* buf)
} }
#ifndef CONFIG_CPU_HAS_DMA_BUS #ifndef CONFIG_CPU_HAS_DMA_BUS
/* Flush CPU caches */ /* Flush caches */
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif #endif
#endif
} }
#endif #endif

4
litex/soc/software/liblitesdcard/sdcard.c
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@ -488,12 +488,10 @@ void sdcard_read(uint32_t block, uint32_t count, uint8_t* buf)
sdcard_stop_transmission(); sdcard_stop_transmission();
#ifndef CONFIG_CPU_HAS_DMA_BUS #ifndef CONFIG_CPU_HAS_DMA_BUS
/* Flush CPU caches */ /* Flush caches */
flush_cpu_dcache(); flush_cpu_dcache();
#ifdef CONFIG_L2_SIZE
flush_l2_cache(); flush_l2_cache();
#endif #endif
#endif
} }
#endif #endif