| .. |
|
__init__.py
|
add test directory with test_code_8b10b.py (from misoc)
|
2017-04-24 18:46:55 +02:00 |
|
test_avalon_mm.py
|
Merge branch 'master' into avalon-burst-test
|
2023-05-10 11:12:30 +02:00 |
|
test_axi.py
|
soc/test: Make data_width/address_width/addressing explicit on Wishbone.Interface calls.
|
2023-10-27 10:55:13 +02:00 |
|
test_axi_lite.py
|
soc/test: Make data_width/address_width/addressing explicit on Wishbone.Interface calls.
|
2023-10-27 10:55:13 +02:00 |
|
test_axi_stream.py
|
test: Add minimal test_axi_stream test (Just syntax check for now).
|
2022-09-08 11:53:05 +02:00 |
|
test_bitbang.py
|
test: add SPDX License identifier to header and specify file is part of LiteX.
|
2020-08-23 15:40:21 +02:00 |
|
test_clock.py
|
cores/clocks/lattice_ecp5: Rename ECP5Delay to ECP5DynamicDelay and adapt style for consistency.
|
2022-01-25 11:09:15 +01:00 |
|
test_code_8b10b.py
|
soc/cores/code_8b10b: add StreamEncoder/Decoder (to be used with LiteX's streams).
|
2020-10-21 09:29:21 +02:00 |
|
test_cpu.py
|
test/test_cpu: Disable cv32e40p test (need to update/wait for pythondata to be updated).
|
2024-05-14 12:53:09 +02:00 |
|
test_csr.py
|
csr_bus: Honour re signal from the upstream bus
|
2024-06-23 19:35:19 +01:00 |
|
test_ecc.py
|
test: add SPDX License identifier to header and specify file is part of LiteX.
|
2020-08-23 15:40:21 +02:00 |
|
test_emif.py
|
test: add SPDX License identifier to header and specify file is part of LiteX.
|
2020-08-23 15:40:21 +02:00 |
|
test_fifosyncmacro.py
|
test: FifoSyncMacro: Use F4PGA instead of deprecated Symbiflow
|
2022-06-17 16:27:25 +02:00 |
|
test_gearbox.py
|
inteconnect/stream: Increase io_lcm size when io_lcm/i_dw or io_lcm/o_dw < 2.
|
2021-03-18 13:47:10 +01:00 |
|
test_hyperbus.py
|
soc/cores/hyperbus/HyperRAMPHY: Add specific sampling clk_domain.
|
2024-08-22 19:53:45 +02:00 |
|
test_i2c.py
|
test_i2c: whitespace cleanups
|
2024-07-20 15:45:44 +10:00 |
|
test_i2s.py
|
test: add SPDX License identifier to header and specify file is part of LiteX.
|
2020-08-23 15:40:21 +02:00 |
|
test_icap.py
|
cores/icap/ICAP: Add Register read capability.
|
2021-10-04 17:22:57 +02:00 |
|
test_led.py
|
soc/cores/led: Review/Rework #1265.
|
2022-04-04 15:24:54 +02:00 |
|
test_packet.py
|
test: Rename new test_packet/stream to test_packet2/stream2 and revert old tests.
|
2021-10-23 17:40:41 +02:00 |
|
test_prbs.py
|
test: add SPDX License identifier to header and specify file is part of LiteX.
|
2020-08-23 15:40:21 +02:00 |
|
test_reduce.py
|
gen/common/Reduce: Add ADD support.
|
2022-10-28 19:13:27 +02:00 |
|
test_spi.py
|
test: add SPDX License identifier to header and specify file is part of LiteX.
|
2020-08-23 15:40:21 +02:00 |
|
test_spi_mmap.py
|
test/spi_mmap: be less verbose
|
2024-04-05 12:35:47 +11:00 |
|
test_spi_opi.py
|
test: add SPDX License identifier to header and specify file is part of LiteX.
|
2020-08-23 15:40:21 +02:00 |
|
test_stream.py
|
stream/Buffer: Integrate PipeValid/PipeReady (both configurable) and add tests.
|
2022-09-07 08:59:37 +02:00 |
|
test_timer.py
|
test/test_timer: Update.
|
2021-05-27 19:37:51 +02:00 |
|
test_wishbone.py
|
test/test_wishbone: Improve origin_region_remap_test to test more complex remapping.
|
2024-02-28 19:11:55 +01:00 |
c857f7845e