This website requires JavaScript.
Explore
Help
Sign In
Hardware
/
litex
mirror of
https://github.com/enjoy-digital/litex.git
Watch
1
Star
0
Fork
You've already forked litex
0
Code
Issues
Packages
Projects
Releases
Wiki
Activity
04f29e97e2
litex
/
misoclib
/
mem
/
litesata
/
example_designs
History
Florent Kermarrec
9107710f03
litexxx cores: use default baudrate of 115200 for all tests
2015-03-20 12:22:53 +01:00
..
build
litesata: fix permissions and imports
2015-03-04 00:46:24 +00:00
platforms
litesata: avoid hack on kc705 platform with new mibuild toolchain management
2015-03-14 01:08:36 +01:00
targets
liteXXX cores: use new uart and import FlipFlop/Counter/Timeout from Migen
2015-03-01 16:48:41 +01:00
test
litexxx cores: use default baudrate of 115200 for all tests
2015-03-20 12:22:53 +01:00
make.py
litesata: fix permissions and imports
2015-03-04 00:46:24 +00:00