Florent Kermarrec 0c028d1614 clock/efinix_trion: Add n parameter, rename pll_name to name.		2021-11-09 11:19:27 +01:00
..
build	sim/verilator: Revert regular_comb change and just pass it to get_verilog as before.	2021-11-05 16:27:38 +01:00
compat	soc/add_spi_flash: Move integration code for previous LiteX SPI Flash core to compat/soc_add_spi_flash.py.	2021-07-29 18:48:03 +02:00
gen	fhdl/verilog: Fix sig.direction regression.	2021-10-31 23:40:11 +01:00
soc	clock/efinix_trion: Add n parameter, rename pll_name to name.	2021-11-09 11:19:27 +01:00
tools	tools/litex_client: Add --length parameter for MMAP read accesses.	2021-10-22 09:07:19 +02:00
__init__.py	get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed.	2021-09-28 16:27:13 +02:00