litex/misoclib/soc
Florent Kermarrec 165a5b6760 soc: use self.cpu_reset_address as rom mem_map address and increase default bios size to 0xa000 2015-02-28 20:04:51 +01:00
..
__init__.py soc: use self.cpu_reset_address as rom mem_map address and increase default bios size to 0xa000 2015-02-28 20:04:51 +01:00
cpuif.py remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future) 2015-02-28 11:36:15 +01:00
sdram.py test implementation on all targets and fix issues 2015-02-28 12:04:51 +01:00