litex/misoclib/tools/litescope/host/driver
Florent Kermarrec 1281a463d6 litescope/bridge: create a generic wishbone bridge that can be used with different phys (the phy needs to provide a sink/source with 8bits data).
- we can now pass a phy to LiteScopeWishboneBridge
- LiteScopeUART2Wishbone is only a specific LiteScopeWishboneBridge
- UART mux is removed since complicated and no longer useful (we can now create easily virtual UART over Ethernet, USB or PCIe) or simply add another UART for debug.
2015-05-01 17:51:18 +02:00
..
__init__.py merge litescope 2015-02-28 10:24:49 +01:00
etherbone.py litescope: remove repeat mode on drivers (not useful) and cleanup 2015-04-18 15:37:38 +02:00
io.py litescope: use full name in io.py 2015-05-01 17:49:31 +02:00
la.py litescope: pep8 (E302) 2015-04-13 13:18:21 +02:00
pcie.py litescope: remove repeat mode on drivers (not useful) and cleanup 2015-04-18 15:37:38 +02:00
reg.py litescope: fix read in reg.py 2015-04-20 08:16:31 +02:00
truthtable.py litescope: pep8 (E225) 2015-04-13 13:37:46 +02:00
uart.py litescope/bridge: create a generic wishbone bridge that can be used with different phys (the phy needs to provide a sink/source with 8bits data). 2015-05-01 17:51:18 +02:00