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litex
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https://github.com/enjoy-digital/litex.git
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1368b666df
litex
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verilog
History
Sebastien Bourdeauducq
1368b666df
s6ddrphy: prepare quilt
2012-02-14 15:52:39 +01:00
..
lm32
LM32: make IP read-only and interrupt lines level-sensitive
2012-02-07 00:07:12 +01:00
m1reset
Proper reset generation
2011-12-16 22:25:26 +01:00
s6ddrphy
s6ddrphy: prepare quilt
2012-02-14 15:52:39 +01:00