137 lines
4.8 KiB
Verilog
137 lines
4.8 KiB
Verilog
// ==================================================================
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// >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
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// ------------------------------------------------------------------
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// Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
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// ALL RIGHTS RESERVED
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// ------------------------------------------------------------------
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//
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// IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
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//
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// Permission:
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//
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// Lattice Semiconductor grants permission to use this code
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// pursuant to the terms of the Lattice Semiconductor Corporation
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// Open Source License Agreement.
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//
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// Disclaimer:
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//
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// Lattice Semiconductor provides no warranty regarding the use or
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// functionality of this code. It is the user's responsibility to
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// verify the user's design for consistency and functionality through
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// the use of formal verification methods.
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//
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// --------------------------------------------------------------------
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//
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// Lattice Semiconductor Corporation
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// 5555 NE Moore Court
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// Hillsboro, OR 97214
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// U.S.A
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//
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// TEL: 1-800-Lattice (USA and Canada)
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// 503-286-8001 (other locations)
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//
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// web: http://www.latticesemi.com/
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// email: techsupport@latticesemi.com
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//
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// --------------------------------------------------------------------
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// FILE DETAILS
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// Project : LatticeMico32
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// File : lm32_adder.v
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// Title : Integer adder / subtractor with comparison flag generation
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// Dependencies : lm32_include.v
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// Version : 6.1.17
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// : Initial Release
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// Version : 7.0SP2, 3.0
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// : No Change
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// Version : 3.1
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// : No Change
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// =============================================================================
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`include "lm32_include.v"
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/////////////////////////////////////////////////////
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// Module interface
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/////////////////////////////////////////////////////
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module lm32_adder (
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// ----- Inputs -------
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adder_op_x,
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adder_op_x_n,
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operand_0_x,
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operand_1_x,
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// ----- Outputs -------
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adder_result_x,
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adder_carry_n_x,
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adder_overflow_x
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);
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/////////////////////////////////////////////////////
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// Inputs
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/////////////////////////////////////////////////////
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input adder_op_x; // Operating to perform, 0 for addition, 1 for subtraction
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input adder_op_x_n; // Inverted version of adder_op_x
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input [`LM32_WORD_RNG] operand_0_x; // Operand to add, or subtract from
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input [`LM32_WORD_RNG] operand_1_x; // Opearnd to add, or subtract by
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/////////////////////////////////////////////////////
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// Outputs
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/////////////////////////////////////////////////////
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output [`LM32_WORD_RNG] adder_result_x; // Result of addition or subtraction
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wire [`LM32_WORD_RNG] adder_result_x;
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output adder_carry_n_x; // Inverted carry
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wire adder_carry_n_x;
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output adder_overflow_x; // Indicates if overflow occured, only valid for subtractions
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reg adder_overflow_x;
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/////////////////////////////////////////////////////
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// Internal nets and registers
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/////////////////////////////////////////////////////
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wire a_sign; // Sign (i.e. positive or negative) of operand 0
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wire b_sign; // Sign of operand 1
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wire result_sign; // Sign of result
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/////////////////////////////////////////////////////
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// Instantiations
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/////////////////////////////////////////////////////
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lm32_addsub addsub (
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// ----- Inputs -----
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.DataA (operand_0_x),
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.DataB (operand_1_x),
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.Cin (adder_op_x),
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.Add_Sub (adder_op_x_n),
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// ----- Ouputs -----
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.Result (adder_result_x),
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.Cout (adder_carry_n_x)
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);
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/////////////////////////////////////////////////////
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// Combinational Logic
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/////////////////////////////////////////////////////
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// Extract signs of operands and result
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assign a_sign = operand_0_x[`LM32_WORD_WIDTH-1];
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assign b_sign = operand_1_x[`LM32_WORD_WIDTH-1];
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assign result_sign = adder_result_x[`LM32_WORD_WIDTH-1];
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// Determine whether an overflow occured when performing a subtraction
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always @(*)
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begin
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// +ve - -ve = -ve -> overflow
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// -ve - +ve = +ve -> overflow
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if ( (!a_sign & b_sign & result_sign)
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|| (a_sign & !b_sign & !result_sign)
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)
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adder_overflow_x = `TRUE;
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else
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adder_overflow_x = `FALSE;
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end
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endmodule
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