litex/misoclib/com/uart
Florent Kermarrec 1e6d1deae8 uart: add sim phy 2015-03-01 16:52:50 +01:00
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phy uart: add sim phy 2015-03-01 16:52:50 +01:00
test uart: create phy directory and move phy logic to serial.py (will enable selecting uart phy, for example virtual uart with LiteEth or sim model for Verilator) 2015-03-01 12:14:34 +01:00
__init__.py uart: create phy directory and move phy logic to serial.py (will enable selecting uart phy, for example virtual uart with LiteEth or sim model for Verilator) 2015-03-01 12:14:34 +01:00