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1f71f3d68b
litex
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litex
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Florent Kermarrec
1f71f3d68b
soc/cores/hyperbus: Cleanup CSn/Clk generation and add comments.
2024-08-20 10:40:24 +02:00
..
build
Merge pull request
#2028
from VOGL-electronic/spi_ram_add
2024-08-16 19:08:48 +02:00
compat
…
gen
gen/fhdl/hierarchy: Sort instances to generate deterministic hierarchy in verilog.
2024-07-03 21:44:31 +02:00
soc
soc/cores/hyperbus: Cleanup CSn/Clk generation and add comments.
2024-08-20 10:40:24 +02:00
tools
tools/litex_sim: Cleanup imports.
2024-07-18 12:16:23 +02:00
__init__.py
get_data_mod(): fix recursive exception reporting
2024-04-22 12:09:45 +10:00