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24463a168a
litex
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misoclib
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com
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litepcie
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frontend
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Florent Kermarrec
0a115f609e
litepcie/frontend/dma: group loop index and count in loop_status register (avoid 2 register reads)
2015-07-24 13:52:57 +02:00
..
dma
litepcie/frontend/dma: group loop index and count in loop_status register (avoid 2 register reads)
2015-07-24 13:52:57 +02:00
__init__.py
add litepcie core
2015-04-17 13:45:01 +02:00
wishbone.py
use similar names for wishbone bridges and move wishbone drivers to [core]/software
2015-05-02 16:22:30 +02:00