litex/migen/bus
Sebastien Bourdeauducq ef436a1ec9 bus/asmibus: add get_slots, fix get_fragment 2012-02-10 17:49:06 +01:00
..
__init__.py CSR bus definitions 2011-12-05 00:16:44 +01:00
asmibus.py bus/asmibus: add get_slots, fix get_fragment 2012-02-10 17:49:06 +01:00
csr.py Remove explicit bus names and rely on the new automatic namer 2012-01-27 22:20:57 +01:00
simple.py Remove explicit bus names and rely on the new automatic namer 2012-01-27 22:20:57 +01:00
wishbone.py Remove explicit bus names and rely on the new automatic namer 2012-01-27 22:20:57 +01:00
wishbone2csr.py bus/wishbone2csr: truncate WB data 2012-02-06 18:43:34 +01:00