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321dd8fcf6
litex
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litex
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soc
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Florent Kermarrec
ff155a474d
soc/tools/remote/comm_uart: be sure to flush in waiting bytes before read and write
2019-02-16 00:08:24 +01:00
..
cores
soc/cores/clock: add actual clk_freqs to config
2019-02-14 10:41:27 +01:00
integration
soc_sdram: add use_full_memory_we parameter to allow disabling vivado workaround on small l2 caches
2019-02-12 12:12:40 +01:00
interconnect
soc/integration/soc_core: allow disabling wishbone timeout
2019-01-29 12:47:11 +01:00
software
bios/sdram: only show read delays when they are valid.
2018-12-19 11:19:47 +01:00
tools
soc/tools/remote/comm_uart: be sure to flush in waiting bytes before read and write
2019-02-16 00:08:24 +01:00
MISOC_LICENSE
litex: reorganize things, first work working version
2015-11-07 17:48:55 +01:00
__init__.py
litex: reorganize things, first work working version
2015-11-07 17:48:55 +01:00