litex/misoclib
Florent Kermarrec 01c5051866 liteeth/software: fix wishbone bridge 2015-06-23 01:48:45 +02:00
..
com liteeth/software: fix wishbone bridge 2015-06-23 01:48:45 +02:00
cpu misoclib/cpu: merge git.py in identifier 2015-05-02 18:42:33 +02:00
mem sdram: use wishbone cache as L2 cache and add optional L2 cache to Minicon 2015-06-17 15:30:30 +02:00
others cores: avoid having too much directories when possible (for simple cores or cores contained in a single file) 2015-05-02 16:22:33 +02:00
soc soc/sdram: add L2_SIZE constant and avoid declaring an empty flush_l2_cache function when L2_SIZE is not defined 2015-06-19 08:39:37 +02:00
tools cores: replace Timeout with new WaitTimer 2015-05-12 16:14:38 +02:00
video global: more pep8 2015-04-13 18:02:26 +02:00
__init__.py