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Florent Kermarrec 38d3f3697b test bist at high speed(working) 2014-12-23 01:39:41 +01:00
lib/sata test bist at high speed(working) 2014-12-23 01:39:41 +01:00
platforms update clock constraints for SATA1 and use sys_clk of 200MHz 2014-12-17 19:24:23 +01:00
sim various fixes and simplifications, SATA1 & SATA2 OK 2014-10-28 02:15:19 +01:00
targets test bist at high speed(working) 2014-12-23 01:39:41 +01:00
test test bist at high speed(working) 2014-12-23 01:39:41 +01:00
Makefile use Vivado programmer instead of IMPACT 2014-12-17 12:07:11 +01:00
README init with repo with simple TestDesign 2014-09-22 13:36:43 +02:00

README

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            |   __|   | | | . | | |  |  |  | | . | |  _| .'| |
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 	Copyright 2014 / Florent Kermarrec / florent@enjoy-digital.fr
 
                        Kintex-7 SATA PHY for M-Labs
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[> Getting started
------------------
1. Obtain MiSoC and follow its "Quick start guide". Set the MSCDIR environment
  variable to the MiSoC directory.

2. Build design:
  make all
  
3. Load design:
  make load

4. Run test:
  make test

[> Cores :
  - UART2Wishbone bridge
  - SATA PHY

[> Contact
E-mail: florent@enjoy-digital.fr