Florent Kermarrec 3b9f287bab sdram: use wishbone cache as L2 cache and add optional L2 cache to Minicon		2015-06-17 15:30:30 +02:00
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__init__.py	rename shadow_address to shadow_base (more appropriate) and use | instead of + (as done in artiq)	2015-05-02 17:07:58 +02:00
cpuif.py	soc/cpuif: add with_access_functions parameter	2015-04-17 13:26:38 +02:00
sdram.py	sdram: use wishbone cache as L2 cache and add optional L2 cache to Minicon	2015-06-17 15:30:30 +02:00