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Build your hardware, easily!
30 Commits 42 Branches 14 Tags 30 MiB
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Python 43.6%
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Sebastien Bourdeauducq 4b15a84505 fhdl: fix += for empty fragment 2011-12-10 20:47:06 +01:00
examples Corelogic conversion example 2011-12-08 21:25:05 +01:00
migen fhdl: fix += for empty fragment 2011-12-10 20:47:06 +01:00
.gitignore Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00