Florent Kermarrec c44a4b051f soc/interconnect/stream: add first signal to streams (avoid over-complicated code in some cases)		2017-06-09 19:35:48 +02:00
..
__init__.py	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00
csr.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
csr_bus.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
csr_eventmanager.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
stream.py	soc/interconnect/stream: add first signal to streams (avoid over-complicated code in some cases)	2017-06-09 19:35:48 +02:00
stream_packet.py	soc/interconnect/stream_packet.py: make error payload optional on Packetizer	2017-03-28 12:21:54 +02:00
stream_sim.py	soc/interconnect/stream_sim: add more genericity to PacketStreamer/PacketLogger to use them for all cores	2016-03-31 00:02:22 +02:00
wishbone.py	merge most of misoc 54e1ef82 and migen e93d0601 changes	2017-01-13 03:55:00 +01:00
wishbone2csr.py	for now use our fork of migen (to be able to simulate our designs)	2015-11-13 18:31:46 +01:00
wishbonebridge.py	soc/interconnect/stream: use valid/ready/last signals instead of stb/ack/eop (similar to AXI)	2016-03-16 20:13:47 +01:00