Tim 'mithro' Ansell 5cbc5bc199 Adding testing of cpu variants.		2019-04-26 18:57:49 -05:00
..
__init__.py	…
test_axi.py	soc/interconnect/axi: add AXIBurst2Beat	2019-04-19 12:13:16 +02:00
test_axi_lite.py	test: remove waveforms generation	2019-04-22 08:41:28 +02:00
test_code_8b10b.py	replace litex.gen imports with migen imports	2018-02-23 13:38:19 +01:00
test_csr.py	test: add basic test_csr	2019-02-27 21:46:00 +01:00
test_gearbox.py	test: remove waveforms generation	2019-04-22 08:41:28 +02:00
test_targets.py	Adding testing of cpu variants.	2019-04-26 18:57:49 -05:00