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Build your hardware, easily!
22 Commits 40 Branches 14 Tags 26 MiB
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Python 43.5%
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Sebastien Bourdeauducq 512655c108 fhdl: improve automatic signal naming 2011-12-08 21:28:20 +01:00
examples Corelogic conversion example 2011-12-08 21:25:05 +01:00
migen fhdl: improve automatic signal naming 2011-12-08 21:28:20 +01:00
.gitignore Initial import, FHDL basic structure, divider example 2011-12-04 16:44:38 +01:00