litex/misoclib/soc
Florent Kermarrec ba8b24df57 sdram: pass module as phy parameter, define memtype in modules and only keep phy parameter in register_sdram_phy 2015-03-25 16:57:38 +01:00
..
__init__.py rename sdram mapping to main_ram 2015-03-21 21:01:46 +01:00
cpuif.py cpuif: add CSR_ prefix to CSR base addresses (avoid conflicts between CSR and mems bases) 2015-03-02 16:52:17 +01:00
sdram.py sdram: pass module as phy parameter, define memtype in modules and only keep phy parameter in register_sdram_phy 2015-03-25 16:57:38 +01:00