litex/litex
2017-12-27 00:00:05 +01:00
..
boards Add TinyFPGA platform based on Migen. 2017-12-27 00:00:05 +01:00
build Add TinyFPGA platform based on Migen. 2017-12-27 00:00:05 +01:00
gen
soc soc/integration/soc_core: add uart_name parameters (allow selecting uart without modifications in platform file) 2017-12-26 18:11:47 +01:00
__init__.py