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litex
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Build your hardware, easily!
fpga
hardware
system-on-chip
4
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42
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14
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30
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C
52.7%
Python
43.6%
Assembly
1.4%
SystemVerilog
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Makefile
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5acf2e169f
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Sebastien Bourdeauducq
5acf2e169f
Examples folder
2011-12-04 23:39:48 +01:00
examples
Examples folder
2011-12-04 23:39:48 +01:00
migen
Reset insertion
2011-12-04 22:41:50 +01:00
.gitignore
Initial import, FHDL basic structure, divider example
2011-12-04 16:44:38 +01:00
test.py
Verilog generator
2011-12-04 22:26:32 +01:00