Florent Kermarrec b2448ba50e soc/cores/jtag: Review/Cleanup JTAGTAPFSM and avoid specific CorrectedOngoingResetFSM.		2022-01-31 16:07:50 +01:00
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__init__.py	litex/gen: reintegrate migen with modifications to be able to simulate with vpi until all missing features of the new simulator are implemented	2015-11-13 14:44:16 +01:00
memory.py	fhdl/memory/write: Avoid slicing data when memory.width == port.we_granularity.	2021-10-30 22:42:55 +02:00
verilog.py	fhdl/verilog: Fix sig.direction regression.	2021-10-31 23:40:11 +01:00