litex/litex
Greg Davill 5faddcdb50 soc.jtag.ecp5: Support all ECP5 devices
- "LFE5UM" devices exclude these without serdes
2021-10-27 20:36:31 +10:30
..
build soc/build: Avoid no_we mode on RAMs and move specialization of Efinix memories to fhdl. 2021-10-25 19:08:09 +02:00
compat soc/add_spi_flash: Move integration code for previous LiteX SPI Flash core to compat/soc_add_spi_flash.py. 2021-07-29 18:48:03 +02:00
gen fhdl/memory_efinix: Add efx to transformed memories to avoid conflicts. 2021-10-25 19:32:18 +02:00
soc soc.jtag.ecp5: Support all ECP5 devices 2021-10-27 20:36:31 +10:30
tools tools/litex_client: Add --length parameter for MMAP read accesses. 2021-10-22 09:07:19 +02:00
__init__.py get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed. 2021-09-28 16:27:13 +02:00