Sebastien Bourdeauducq 60e87f6e87 Merge branch 'master' of https://github.com/m-labs/misoc		2015-03-04 00:46:41 +00:00
..
com	uart: generate ack for rx (serialboot OK with sim)	2015-03-04 00:57:37 +01:00
cpu	litescope: create example design derived from SoC that can be used on all targets	2015-02-28 22:19:24 +01:00
mem	litesata: fix permissions and imports	2015-03-04 00:46:24 +00:00
others	move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future)	2015-02-28 11:51:51 +01:00
soc	soc: remove is_sim function	2015-03-03 10:15:11 +01:00
tools	LiteXXX cores: use format in prints	2015-03-03 10:29:28 +01:00
video	sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it	2015-03-02 08:36:39 +01:00
__init__.py	rename milkymist-ng to MiSoC	2013-11-09 15:27:32 +01:00