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https://github.com/enjoy-digital/litex.git
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6683485841
litex
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misoclib
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mem
History
Florent Kermarrec
c03ef526eb
sdram/phy/s6ddrphy: add DDR3 support
2015-08-04 12:29:42 +02:00
..
flash
spiflash: fix miso bitbang with large DQ
2015-05-06 00:05:25 +08:00
litesata
use sets for leave_out
2015-07-05 22:49:23 +02:00
sdram
sdram/phy/s6ddrphy: add DDR3 support
2015-08-04 12:29:42 +02:00
__init__.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00