litex/examples
Sebastien Bourdeauducq 081b658e2d Update copyright notices
2012-03-23 16:41:30 +01:00
..
basic2_sim.py Update copyright notices 2012-03-23 16:41:30 +01:00
basic_sim.py Update copyright notices 2012-03-23 16:41:30 +01:00
corelogic_conv.py
dataflow.py
dataflow_dma.py
fir.py Update copyright notices 2012-03-23 16:41:30 +01:00
fsm.py
lm32_inst.py fhdl: support forwarding of bidirectional signals from instance ports 2012-02-16 18:34:32 +01:00
memory.py
memory_sim.py Update copyright notices 2012-03-23 16:41:30 +01:00
simple_gpio.py bank: omit device write register when access_bus==READ_ONLY and access_dev==WRITE_ONLY 2012-02-15 18:23:31 +01:00
using_record.py
wb_initiator.py Update copyright notices 2012-03-23 16:41:30 +01:00