litex/litex
Florent Kermarrec 6fe4994f66 targets: add identifier on all targets and update Versa ECP5. 2020-06-30 18:32:11 +02:00
..
boards targets: add identifier on all targets and update Versa ECP5. 2020-06-30 18:32:11 +02:00
build build/sim/core/modules: fix compilation warnings 2020-06-16 01:06:11 +02:00
gen gen/fhdl/verilog: explicitly define input/output/inout wires. 2020-05-05 16:58:33 +02:00
soc software/bios/Makefile: fix #578 merge. (get back #579). 2020-06-29 17:01:36 +02:00
tools tools/remote/comm_pcie: use ctypes.c_uint32 to do 32-bit accesses and avoid double writes/reads. 2020-06-30 14:12:35 +02:00
__init__.py litex/__init__.py: remove retro-compat > 6 months old. 2020-04-30 21:31:58 +02:00