litex/lib/sata
Florent Kermarrec 706fcb536d change FIS endianness (seems to be little endian) 2014-12-20 12:58:37 +01:00
..
command fix ack in idle in some fsm (implementation behaviour different from simulation) 2014-12-20 01:26:02 +01:00
link change FIS endianness (seems to be little endian) 2014-12-20 12:58:37 +01:00
phy use new submodules collection to expose more fsm an modules 2014-12-19 22:50:35 +01:00
test change FIS endianness (seems to be little endian) 2014-12-20 12:58:37 +01:00
transport change FIS endianness (seems to be little endian) 2014-12-20 12:58:37 +01:00
__init__.py use new implicit submodules collection and Pipeline 2014-12-19 01:35:18 +01:00
bist.py use new submodules collection to expose more fsm an modules 2014-12-19 22:50:35 +01:00
common.py use new implicit submodules collection and Pipeline 2014-12-19 01:35:18 +01:00