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75d33a0c05
litex
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examples
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sim
History
Sebastien Bourdeauducq
692794a21f
flow: use Module and new Record APIs
2013-04-10 19:12:42 +02:00
..
abstract_transactions.py
sim: default runner to Icarus Verilog
2013-02-09 17:04:53 +01:00
basic1.py
sim: default runner to Icarus Verilog
2013-02-09 17:04:53 +01:00
basic2.py
sim: default runner to Icarus Verilog
2013-02-09 17:04:53 +01:00
dataflow.py
flow: use Module and new Record APIs
2013-04-10 19:12:42 +02:00
fir.py
examples/sim/fir: convert to new API
2013-03-19 11:46:27 +01:00
memory.py
New 'specials' API
2013-02-22 17:56:35 +01:00